1. Field of the Invention
The present invention relates to a power-on reset circuit, and more particularly, to a power-on reset circuit capable of performing power-on reset accurately with low power consumption.
2. Description of the Prior Art
In an electronic device, when power is turned on in the beginning, an input voltage is too low to provide circuits working correctly. Therefore, a power-on reset circuit is required to detect the input voltage and when the input voltage rises to be equal to a specific voltage capable of providing backend circuits working correctly, the power-on reset circuit generates a power-on reset signal to indicate backend circuits to start working.
For example, a conventional power-on reset circuit utilizes voltage dividing resistors to divide the input voltage and compares the division voltage of the input voltage with a reference voltage by a comparator. When the division voltage of the input voltage is greater than the reference voltage, a power-on reset signal, which is generated by the comparator, changes a state to indicate the backend circuits to start working.
Under such a structure, by utilizing the comparator for comparison, it can accurately indicate the backend circuits to start working when the input voltage reaches a preset specific voltage. However, since the voltage dividing resistors are utilized for dividing the input voltage, resistors of large resistance and consuming large layout area are required to avoid high power consumption due to large current during operations. Besides, a shut-down switch is required to be utilized in this structure to cut off all current when power is turned off. Thus, when the shut-down switch is turned on, an on-resistance is formed in the shut-down switch and results in a voltage difference, such that the comparator can not accurately indicate the backend circuits to start working when the input voltage reaches the preset specific voltage.
On the other hand, please refer to FIG. 1, which illustrates a schematic diagram of a conventional power-on reset circuit 10. In the power-on reset circuit 10, when an input voltage VIN is greater than a summation of a reference voltage VREF, a gate-to-drain voltage difference VGS3 of a transistor MP3, and a saturation voltage VDsat2 of a transistor MP2 (VIN>VREF+VGS3+VDsat2, i.e. a path P1), the transistor MP3 is turned on and transistors MN1 and MN2 are turned on as well. At this moment, an input terminal voltage of an inverter 102 is changed from the input voltage VIN with a high voltage level to a ground voltage with a low voltage level, so a power-on reset signal POR, which is outputted from the inverter 102, changes a state to indicate the backend circuits to start working.
Under such a structure, by utilizing a current mirror MP1, MP2 and MP4, and a current mirror MN1 and MN2 to mirror a current Iq, which is generated from a current source 100, to control the power-on reset signal POR to change a state, it does not require resistors of large resistance and consuming large layout area and can operate with small current to avoid high power consumption. However, due to the process variation of the transistors MP1, MP2, MP3, MP4, MN1, and MN2, the input voltage may not accurately reach a specific voltage capable of providing the backend circuits working correctly (i.e. VIN>VREF+VGS3+VDsat2) when the power-on reset signal POR changes a state, causing problems during operations.
In the prior art, the power-on reset circuit with the structure of the voltage dividing resistors and the comparator can accurately indicate the backend circuits to start working when the input voltage reaches the preset specific voltage, but resistors of large resistance and consuming large layout area are required. The power-on reset circuit with the structure of the current mirrors does not require large resistors consuming large layout area and can operate with small current, but the process variation of the transistors may cause the input voltage not accurately to reach the specific voltage capable of providing backend circuit working correctly when the power-on reset signal POR changes a state. Thus, there is a need for improvement of the prior art.